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A Novel Approach to Design a Nano Metric Reversible Counter

Author Affiliations

  • 1Ardabil University of Medical Sciences, MS in Computer Engineering, Ardabil, IRAN
  • 2Department of Computer Engineering, Yadegar -e- Imam Khomeini (RAH) Branch, Islamic Azad University, Tehran, IRAN

Res. J. Recent Sci., Volume 4, Issue (7), Pages 112-118, July,2 (2015)


Today's Technology that used to build computer circuits, because of the limit, unable to respond the human needs in the design of very fast and low-power computers. That's why scientists are looking for alternative technologies and one these technologies are reversible logic. The reversible gates and reversible logic are designed using reversible logic. The main advantage of reversible logic is obtaining is input vector from the output vector. In this paper the design of a Nano metric reversible counter has been studied. The circuit of reversible Counter is formed flip-flops and logic gates. In fact there are two schemes for reversible counters that use as a Nano metric reversible counter with Parallel Load capacity and concurrent clearance. In this paper, two approaches have been used to design a timer circuit and the proposed circuit characteristics were compared and the results are compared to each other.


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