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Design of Low-Latency 4K HEVC using V-By-One HS Transmission

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Author Affiliations

  • 1Department of Electrical and Computer Engineering, College of Engineering, Effat University, KINGDOM of SAUDI ARABIA
  • 2Design Engineer, AXIIP Semiconductor Pvt Ltd, Chennai, INDIA

Res. J. Recent Sci., Volume 3, Issue (8), Pages 111-118, August,2 (2014)

Abstract

High Efficiency Video Coding (HEVC) is an advanced video coding technique, which is designed to double the Data compression ratio compared to the other video standard with the same level of video quality. The HEVC video coding layer uses the same hybrid approach used in all modern video standards used in earlier H.264. To achieve the high compression ration HEVC supports the recursive quad-tree coding unit structure and 64 × 64 coding tree unit. These features require inter/intra-picture prediction and 2D transforms coding. These are transmitted through the v-by-one HS and new structures of read controller for memory and a sum of absolute difference (SAD) summation block was designed. The memory read controller was designed to reduce the internal memory read time, and the SAD summation block structure supports the recursive quad-tree coding unit structure and the asymmetric motion partitioning mode. Based on requirements of higher-resolution and more color-depth the pixel data problems are transmitted through v-by-one HS by increasing data rate. Here the number of transmission medium will be reduced to solve the skew problem, power consumption and Electromagnetic interference.

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